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  CHM540ANPT c h e n m k o e n t e r p r i s e c o . , l t d s u r f a c e m o u n t n-channel enhancement mode field effect transistor v o l t a g e 100 volts current 36 ampere a p p l i c a t i o n f e a t u r e * super high dense cell design for extremely low r ds(on) . construction * n-channel enhancement * s e r v o m o t o r c o n t r o l . * p o w e r m o s f e t g a t e d r i v e r s . * o t h e r s w i t c h i n g a p p l i c a t i o n s . 2008-01 * high power and current handing capability. a b s o l u t e m a x i m u m r a t i n g s t a = 2 5 c u n l e s s o t h e r w i s e n o t e d s y m b o l parameter CHM540ANPT units v dss drain-source voltage 100 v v gss gate-source voltage 20 v i d maximum drain current - continuous a - pulsed p d maximum power dissipation at tc = 25 140 w t stg storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient 62.5 36 c/w (note 3) note : 1. surface mounted on fr4 board , t <=10sec 2. pulse test , pulse width <= 300us , duty cycle <= 2% 120 * small package. (d2pak) t j operating temperature range -55 to 150 c 3. repetitive rating , pulse width linited by maximum junction temperature (note 1) 4. guaranteed by design , not subject to production trsting c i r c u i t s d g (1) (2) (3) c d2pak d2pak dimensions in inches and (millimeters) 0.420(10.67) 0.380(9.69) 0.360(9.14) 0.625(15.88) 0.575(14.60) 0.320(8.13) 0.245(6.22) 0.100(2.54) 0.037(0.940) 0.190(4.83) 0.055(1.40) 0.045(1.14) 0.055(1.40) 0.047(1.19) 0.025(0.64) 0.110(2.79) 0.090(2.29) 0.018(0.46) 0.110(2.79) 0.080(2.03) 0.160(4.06) 0.027(0.686) 0.095(2.41) min. k 3 1 2 1 gate 3 drain ( heat sink ) 2 source
electrical characteristic ( CHM540ANPT ) e l e c t r i c a l c h a r a c t e r i s t i c s t a = 2 5 c u n l e s s o t h e r w i s e n o t e d s y m b o l p a r a m e t e r c o n d i t i o n s m i n t y p m a x u n i t s o f f c h a r a c t e r i s t i c s o n c h a r a c t e r i s t i c s g fs forward transconductance v ds =25v , i d = 18a r ds(on) static drain-source on-resistance switching characteristics q gs gate-source charge q gd gate-drain charge t on turn-on time ns v dd = 50v i d = 18a , v g s = 10 v 40 t r rise time 35 25 b v d s s drain-source breakdown voltage v gs = 0 v, i d = 250 a n a 100 v n a i gssf dss s zero gate voltage drain current i v ds gate-body leakage = gate-body leakage 100 v, v v gs gs = 20v, = 0 v v ds = 0 v a +100 -100 v gs = -20v, v ds = 0 v v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 2 v 65 t f fall time 45 q g total gate charge 18 vds=80v, id=18a vgs=10v turn-off time t off rgen= 5.1 w (note 2) (note 4) 4 s nc 13 11 32 15 drain-source diode characteristics and maximum ratings 37.5 i v sd drain-source diode forward current drain-source diode forward voltage i s = 18a , v g s = 0 v 36 1.3 a v (note 1) (note 2) 6 48 i gssr 14 48 m w vgs=10v, id=18a 40 dynamic characteristics input capacitance reverse transfer capacitance output capacitance c iss c oss c rss v ds = 25v, v gs = 0v, f = 1.0 mhz 832 240 105 pf


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